Develop integrated process flows and optimize yield in semiconductor manufacturing for Intel. Collaborate across teams to enhance device performance and ensure reliability standards.
Responsibilities
Develop and define integrated process flows for interconnect modules.
Coordinate across lithography, etch, deposition, diffusion, wet clean, CMP, dielectric, and metrology teams.
Optimize RC (resistance-capacitance) performance.
Establish process windows and integration schemes.
Identify BE-driven yield loss mechanisms such as open and short defects, metal voids, low k ILD damage, etc.
Perform root cause analysis using statistical tools (SPC, DOE, FMEA).
Drive corrective actions to improve yield and cycle time.
Implement control plans and process monitoring strategies.
Use statistical tools such as: Cpk / Ppk, Control charts, Capability analysis.
Ensure margins for electromigration, stress migration, TDDB, time dependent via degradation.
Evaluate impact of process window shifts on reliability.
Support ramp from RnD to high-volume manufacturing (HVM).
Document process specifications and standard operating procedures (SOPs).
Requirements
Candidate must possess a PhD degree in one of these fields: Electrical Engineering, Physics, Applied Physics, Optics, Material Science, Chemical Engineering, Mechanical Engineering, or related discipline.
Candidate must possess at least one of the following: 6+ months experience on one or more of the following areas: Semiconductor device fabrication or nanotechnology, Electrical characterization of transistors or other semiconductor devices, Clean room process development.
JMP, MATLAB, Scripting languages (i.e. Python, JSL, TCL), or programming languages (i.e. SQL, C/C++).
Strong understanding of Device physics (CMOS, FinFET, GAA, etc).
Hand on experience in VLSI device fabrication and testing in the lab.
Knowledge of basic VLSI fabrication instruments (i.e. mechanism of dry etcher, ALD (atomic layer deposition), PE CVD, metallization, etc.).
Understanding statistical process control and charting methodology data flow and integrity.
Strong data analysis and presentation acumen.
Integrated process knowledge, including strong design of experiments and model-based problem-solving skills for complex problems, excursions, and defects.
Knowledge of automation and defect classification systems in a fab environment.
Strong stakeholder management and influencing skills. Experience in coordination with other departments, co-workers, etc.
Benefits
We offer a competitive salary and financial benefits such as bonuses, life and disability insurance, opportunities to buy Intel stock at a discounted rate, and Intel stock awards (eligibility at the discretion of Intel Corporation).
We provide benefits that promote a healthy, enjoyable life: excellent medical plans, wellness programs, and amenities, time off, recreational activities, discounts on various products and services, and many more creative perks that make Intel a Great Place to Work.
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