RTL Design Engineer at NVIDIA implementing USB, UFS, Ethernet or PCIE IP's for Automotive chips. Responsible for architectural trade-offs and driving verification processes.
Responsibilities
Be responsible for making architectural trade-offs based on feature/performance/power requirements
Analyze system implications, come up with the micro-architecture, implement RTL, drive the verification, close timing, and support silicon validation
Own micro-architecture and RTL development of design modules
Micro-architect features to meet performance, power and area requirements
Work with HW architects to define critical features
Work with verification teams to verify the correctness of implemented features
Partner with timing, VLSI and Physical design teams to ensure design meets timing, interface requirements and is routable.
Requirements
BTech/MTech with 2+ years of experience in crafting complex Units and CPU/micro-controller based Sub-systems
Knowledge of security standards, protocols and system security architectures of modern SOC's would be a significant plus
Excellent influencing skills resulting in collaboration with cross-cultural, multi geography and matrixed teams
Good debugging, analytical and problem solving skills
Great interpersonal skills and ability to work as an excellent teammate
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