Package Design Engineer at Teledyne e2v leading the design flow of microelectronic packages. Coordinating with teams and vendors to ensure successful design and implementation processes.
About the role
- SoC Physical Design Engineer working on Intel's next generation Client CPU SoC with complex structural designs. Collaborating with various stakeholders on implementation and verification processes.
Responsibilities
- Implement complex structural physical designs including synthesis, floor planning, power-grid and clock tree designs
- Perform place and route (PnR), Static Timing Analysis (STA), timing budgeting and closure
- Conduct RC-extraction, DFM and DRC clean-up
- Verify physical designs through all verification and sign-off flows
- Be involved in defining Structural Design methodology and developing design flows with stakeholders
Requirements
- Bachelor of Engineering degree or a Master of Science in Electronic Electrical or Computer Engineering or equivalent
- Preferably at least 3 years of experience
- Very familiar with Industrial EDA tools and able to provide technical consultation and design trade-off
Benefits
- Flexible working arrangements
- Professional development opportunities
Job title
Job type
Experience level
Salary
Not specified
Degree requirement
Location requirements
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