Principal System Power Engineer overseeing power architecture for high-performance AI accelerators. Leading design solutions for power delivery and integrity in cutting-edge hardware.
Responsibilities
Lead architect for the energy backbone of AI accelerators
Architect end-to-end power delivery solutions for high-TDP AI accelerators
Lead power delivery for chiplet-based architectures
Drive power integrity strategy across the board
Partner with Hardware Qualification and SI/PI teams to define validation suites
Drive technical requirements and design reviews with ODM partners
Collaborate with thermal engineers to optimize layout for heat dissipation
Requirements
12+ years of experience in power electronics and system-level power delivery for HPC, GPUs, or Data Center hardware
BS/MS/PhD in Electrical Engineering or a related technical field
Expert knowledge of DC-DC converter topologies (Buck, Multiphase, TLVR)
Deep understanding of PDN modeling and simulation (e.g., Ansys SIwave, Cadence Sigrity/CST)
Experience with high-current transients (di/dt) associated with 5nm/3nm process nodes
Proficiency with high-speed scopes, electronic loads, and FRA (Frequency Response Analyzers) for Bode plot and impedance measurements
Proven track record of designing power for complex packages or multi-die modules.
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