Firmware Detection Engineer in FPGA design and testing for cybersecurity solutions at Shift5. Collaborating with teams to enhance detection algorithms and capabilities.
Responsibilities
Architect and define FPGA-based detection capabilities which identify anomalies, unexpected protocol behavior, and threatening behavior in serial buses communications.
Integrate detection capabilities with data acquisition and transmissions capabilities.
Design and model detection logic for avionic serial busses (e.g., MIL-STD-1553, ARINC 429) in Simulink, and use HDL Coder to automatically generate, verify, and implement this logic on FPGAs.
Manage the full model-based design lifecycle for serial bus detections: from algorithm conception and simulation to hardware implementation and in-system validation.
Perform investigations of real-world anomalies across OT communication buses, using your protocol expertise to enhance detection algorithms.
Work with hardware validation and software QA engineers to conduct rigorous testing, including hardware-in-the-loop (HIL) validation for FPGA designs.
Collaborate with vulnerability researchers to translate novel exploit techniques into detectable signatures suitable for FPGA-based serial bus monitoring.
Read technical documentation such as avionic standards, and device datasheets to inform your algorithm and model design.
Troubleshoot and resolve issues across hardware, firmware, and software.
Document your algorithms, models, and verification results for both technical and non-technical audiences.
Be ready to learn and be flexible, contributing to a wide variety of work in support of Shift5 priorities.
Work from Shift5 HQ in Rosslyn VA, 2-3 days a week, and occasionally travel (<15%).
Requirements
BS or MS in Electrical Engineering, Computer Engineering, or a related field.
3+ years of experience in FPGA design and testing, preferably with VHDL.
Proficiency with model-based design using MATLAB, Simulink, and HDL Coder for targeting FPGAs.
Experience with serial bus protocols (MIL-STD-1553, ARINC 429, Ethernet, CANBUS/J1939, ASCB)
Experience integrating HDL Coder outputs with FPGA development toolchains for synthesis, place-and-route, and timing closure.
Strong understanding of VHDL/Verilog for integration and debugging purposes.
Knowledge of AXI4 and AXI4-Stream protocols.
Experience with scripting languages (TCL, Bash, Python, etc.).
Experience designing HDL simulations (ModelSim, GHDL, or similar).
Experience with embedded software development (C, C++, Rust, or similar).
Comfortable debugging firmware, software, and hardware issues.
Proficient with the Linux command line environment.
Experience with Git or similar version control, and CI/CD automations.
Experience with protocol analysis tools and oscilloscopes for validating serial bus communications (e.g., protocol analyzers, digital storage oscilloscopes with serial decode capabilities)
A solid grasp of cybersecurity concepts as they apply to embedded and RF systems.
A US Government Security Clearance or the ability to obtain one.
Benefits
Bonus program and equity in a fast-growing startup
Competitive medical, dental, and vision coverage for employees and their families
Health Savings Account with annual employer contributions
Employer-paid Life and Disability Insurance
Uncapped paid time off policy
Flexible work & remote work policy
Tax-deferred public transit benefits with Metro SmartBenefits (DC/MD/VA)
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