Payer Solutions Architect coordinating rollout of State and Payer solutions for homecare technology platform. Ensuring customer engagement and timely project implementations while managing multiple stakeholder needs.
About the role
- Platform Integration Engineer for Intel's Chassis Group developing SOC architectures and high-performance chip networks. Collaborating across teams and modifying IP components for specific needs.
Responsibilities
- Working with the SoC architecture teams to understand the SoC chassis requirements
- Designing and developing high-performance networks-on-chip which meet the SoC PPA requirements
- Coordinating with the foundation IP development team within the Chassis Group to modify/create IP components as per SoC needs
Requirements
- Bachelor's in Science, Electrical Engineering or equivalent with 5+ years experience – OR – Master's degree in Science, Electrical Engineering or equivalent with 4+ years experience
- Experience in SOC and/or IP design
- Experience in SoC interconnect design and microarchitecture, coherent and non-coherent fabrics, AMBA/PCIe/CXL protocols and memory subsystems.
Benefits
- competitive pay
- stock bonuses
- health
- retirement
- vacation
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