Senior Density Fill Development Engineer at Intel creating algorithms and tools for semiconductor design processes. Collaborating across teams to enhance manufacturing and product innovation.
About the role
- Signal Integrity Engineer developing and analyzing PCB designs for communication products. Collaborating with teams to ensure product quality and performance in electrical engineering.
Responsibilities
- Develop SI and PI design for server/storage/communication products
- Major works are to serve as the signal and power integrity analyst and designer
- Perform static timing and signal integrity analysis of parallel (common clock, source-synchronous) interfaces
- Design and analysis of multi-gigabit serial links, including lab verification and tuning
- Generate and verify PCB layout rules, manage constraints for PCB layout
- Cooperate with R&D team and signal test engineers on debugging, failure analysis and fixing issues discovered during test
Requirements
- 8+ years in a similar role or industry
- BSEE or related field with 8 years of applicable work experience or MSEE or related field with 6 years of experience
- Familiar with PCIe, DDR5, Ethernet specifications
- Strong written and oral communication in English with customer service skills
- Experience with Keysight ADS, Power DC/SI for both time and frequency domain circuit simulation
- Experience with 3-D field solver Synopsis ANSYS HFSS
- Proficiency in Electromagnetic, Transmission-line & S-parameters theory and modeling
Benefits
- Competitive salary
- Health insurance
- Paid time off
- Professional development
- Remote work options
- Employee assistance program
Job title
Job type
Experience level
Salary
Not specified
Degree requirement
Location requirements
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