Hybrid Semiconductor Digital Architect

at The College of Education at The University of Texas at Austin

• Job title: Semiconductor Digital Architect
• Job type: Full Time
• Experience level: Senior, Lead
• Salary: Not specified
• Degree requirement: Postgraduate Degree
• Tech skills: Python
• Location requirements: Hybrid, Austin, United States

About the role

• Develop next-generation digital subsystems and compute fabrics for microsystems in semiconductor institute. Collaborate on architecture optimization and integration across AI and HPC platforms.

Responsibilities

• Architect next-generation digital subsystems and compute fabrics for 2.5D/3D microsystems—enabling scalable, high-bandwidth integration across AI, HPC, and wireless acceleration platforms.
• Define and optimize architecture specifications, dataflows, and interconnect topologies (chiplet fabrics, NoCs, HBM, PCIe/CXL) across heterogeneous dies.
• Collaborate with EDA, packaging, and system modeling teams to co-optimize digital architectures for performance, power, and reliability.
• Lead system-level modeling and design-space exploration for AI and signal-processing workloads using simulation and prototyping frameworks.
• Engage with industry partners and standards bodies (UALink, NVLink Fusion, UltraEthernet, CXL 3.x) to shape ecosystem directions.
• Mentor internal design teams on RTL methodologies, IP integration, and verification best practices for multi-die systems.
• Translate architectural innovations into roadmaps and reference designs, driving alignment between research, productization, and customer enablement.
• Other related functions as assigned.

Requirements

• Master’s of Science in Electrical or Computer Engineering.
• 12 years of experience in digital or system architecture for SoC/FPGA/ASIC designs, with strong exposure to AI, networking, or HPC accelerators.
• Deep expertise in dataflow architectures, memory hierarchies, interconnects, and compute optimization.
• Hands-on experience with RTL design/verification (SystemVerilog/VHDL), hardware-software co-design, and FPGA prototyping.
• Proficiency in performance modeling and architectural trade-off analysis (SystemC, C++, or Python-based frameworks).
• Strong cross-disciplinary collaboration—able to interface with packaging, EDA, and process engineering teams.
• Proven record of delivering complex digital design programs from concept through execution.

Benefits

• Competitive health benefits (employee premiums covered at 100%, family premiums at 50%)
• Voluntary Vision, Dental, Life, and Disability insurance options
• Generous paid vacation, sick time, and holidays
• Teachers Retirement System of Texas, a defined benefit retirement plan, with 8.25% employer matching funds
• Additional Voluntary Retirement Programs: Tax Sheltered Annuity 403(b) and a Deferred Compensation program 457(b)
• Flexible spending account options for medical and childcare expenses
• Robust free training access through LinkedIn Learning plus professional conference opportunities
• Tuition assistance
• Expansive employee discount program including athletic tickets
• Free access to UT Austin's libraries and museums with staff ID card
• Free rides on all UT Shuttle and Austin CapMetro buses with staff ID card