Senior CAD Designer at ANS shaping the future of multi - disciplinary engineering. Leading design efforts, mentoring junior staff, and delivering complex design solutions in civil engineering.
About the role
- IP Design Verification Engineer developing verification plans and testbenches for Intel's SoC IP; debugging presilicon issues and collaborating with architects and RTL teams.
Responsibilities
- Performs functional verification of IP logic to ensure design will meet specification requirements.
- Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications.
- Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs.
- Replicates, root causes, and debugs issues in the presilicon environment.
- Finds and implements corrective measures to resolve failing tests.
- Collaborates with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features.
- Documents test plans and drives technical reviews of plans and proofs with design and architecture teams.
- Maintains and improves existing functional verification infrastructure and methodology.
- Participates in the definition of verification infrastructure and related TFMs needed for functional design verification.
Requirements
- Graduate Computer Science/Electronics/Mathematics
- Minimum 7 years of experience in verification domain
- e (Specman) and/or SV languages
- Experience with industry-standard EDA tools and simulation environments
- High programming and debugging skills
- Knowledge of Digital Integrated Circuits
- Knowledge of Hardware Description Languages (VHDL/Verilog) desired
- Knowledge of scripting tools and languages (Perl, python)
- Knowledge of development tools (DVT, versioning tools)
- Proficiency with OOP (C++, Java)
- Good communication skills and strong interpersonal skills
- Preferred: Knowledge of AI/ML integration in verification workflows
- Preferred: Familiarity with Formal methodology and tools
- Preferred: Debugging RTL failures
- Requirements may be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Benefits
- This role is available as a fully home-based and generally would require you to attend Intel sites only occasionally based on business need.
- However, you must live and work from the country specified in the job posting, in which Intel has a legal presence.
- Due to legal regulations, remote work from any other country is unfortunately not permitted.
Job title
Job type
Experience level
Salary
Not specified
Degree requirement
Tech skills
Location requirements
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