Hybrid ASIC/FPGA Engineer

at Nokia

• Job title: ASIC/FPGA Engineer
• Job type: Full Time
• Experience level: Mid level, Senior
• Salary: Not specified
• Degree requirement: Postgraduate Degree
• Tech skills: Python
• Location requirements: Hybrid, Stuttgart, Germany

About the role

• Join Nokia's Optics Subsystems as an ASIC/FPGA Engineer developing cutting-edge optical transmission systems. Play a key role in soft-decision FEC algorithm implementation and validation.

Responsibilities

• Contribute to the design, implementation and validation of soft‑decision FEC (Forward Error Correction) algorithms (10%–50% overhead) targeting near‑capacity performance in >800 Gbit/s coherent links.
• Develop simulation environments and testbenches; characterize BER (Bit Error Rate)/FER (Frame Error Rate) vs. SNR (Signal-to-Noise Ratio) and optical impairments; compare against golden models.
• Contribute to defining fixed‑point formats, quantization strategies, parallel/pipelined decoder architectures, and memory organization for ASIC (Application-Specific Integrated Circuit) realization.
• Collaborate closely with ASIC (Application-Specific Integrated Circuit) teams to translate algorithms into robust modem implementations, in generation of test vectors and supporting hardware/software co‑verification.

Requirements

• Must have:
• Master’s or Ph.D. in Electrical Engineering, Computer Engineering, or related field; exceptional Bachelor’s with relevant internships considered.
• Foundational knowledge across: Binary BCH, Reed‑Solomon, Turbo Product codes (BCH components), Binary LDPC (regular/irregular/spatially coupled), Staircase codes, CFEC, OFEC.
• Practical experience in MATLAB, C, and C++; ability to write clear, well‑tested numerical code.
• Strong analytical skills, collaborative mindset, independent work ethic, and effective communication.
• Due to cross-location collaborations, the candidate must be fluent in English. Knowledge of German and/or Italian is a plus.
• Nice to have:
• Hands‑on FEC (Forward Error Correction) design with proven delivery (tape‑outs, deployed systems).
• Exposure to ASIC (Application-Specific Integrated Circuit) concepts (parallelism, fixed‑point arithmetic, high‑throughput design) via coursework or internships.
• Familiarity with scripting/automation (Python), version control (Git), and basic FPGA/emulation flows.

Benefits

• Flexible and hybrid working schemes
• A minimum of 90 days of Maternity and Paternity Leave, with the option to return to work within a year following the birth or adoption of a child (based on eligibility)
• Life insurance to all employees to provide peace of mind and financial security
• Well-being programs to support your mental and physical health
• Opportunities to join and receive support from Nokia Employee Resource Groups (NERGs)
• Employee Growth Solutions to support your personalized career & skills development
• Diverse pool of Coaches & Mentors to whom you have easy access
• A learning environment which promotes personal growth and professional development - for your role and beyond