Silicon Validation Engineer for HPE supporting validation of Slingshot ASIC products through chip-level testing. Collaborating with design and architecture teams to ensure ASIC functionality and performance.
Responsibilities
Develop, execute, and maintain chip‑level validation tests for HPE Slingshot NIC and switch ASICs, primarily using emulator‑based environments
Create object‑oriented Python test infrastructure and test cases that operate at the operating‑system and system‑integration level
Validate both HPE Slingshot–specific functionality and industry‑standard networking protocols
Debug functional, performance, and reliability issues uncovered during silicon validation, working closely with design, architecture, firmware, and software teams
Contribute to validation planning by identifying coverage gaps and proposing additional test scenarios within assigned areas
Support bring‑up activities for new ASIC revisions and platforms
Document validation results, defects, and lessons learned to improve future validation effectiveness
Participate in design reviews, validation reviews, and post‑silicon issue triage
Requirements
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience
Typically 4–8 years of experience in VLSI validation, verification, or related silicon engineering roles
Proficiency with Python programming
Proficiency in object‑oriented programming
Experience writing tests for integrated circuits
Proficiency with Linux command‑line environments
Working knowledge of Verilog or other hardware description languages
Experience with ASIC silicon validation or post‑silicon testing
Working knowledge of high‑speed networking concepts and protocols (Ethernet, SERDES fundamentals)
Ability to independently execute validation tasks and debug complex technical issues
Strong written and verbal communication skills in English.
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